Low EMI Driver Circuit

ABSTRACT

A driver circuit, in accordance with one example, includes a controllable current source operably coupled to the load and configured to sink or source a first current in accordance with a control signal. A controllable switch is responsive to an input signal, operably coupled to the current source, and configured to take over, or not, the first current in accordance with an input signal. The first current is directed as a load current through the load when the controllable switch is driven into a blocking state. The first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load. An input signal includes a first series of pulses defining the desired load current waveform in accordance with a desired modulation scheme.

TECHNICAL FIELD

The present disclosure relates to the field of driver circuits for providing modulated supply currents to electrical loads, particularly to LED driver circuits for providing a modulated source current to LED devices.

BACKGROUND

Various driver circuits are known for supplying a defined current to loads such as light emitting diodes (LEDs). As LEDs are current driven electrical loads usually a current source is used for supplying the LED with current. The load current defines the brightness of the LED device which may be a single LED component or a device including a plurality of LEDs, e.g., connected in series. In order to allow for adjusting the intensity of the emitted light (i.e., the perceived brightness) a controllable current source may be used that is set to a current representing a desired brightness. In digitally controlled applications a digital-to-analog converter (DAC) may be used to set the current of the controllable current source.

Since the human eye cannot resolve high frequency brightness fluctuations of approximately 100 hertz or higher, it is known to supply the LED with a modulated (e.g., pulse width modulated or pulse density modulated, etc.) current of sufficient frequency. In this case the human eye low-pass filters the resulting (e.g., pulse width) modulated brightness of the LED, i.e., the eye can only sense a mean brightness that depends on the mean LED current which is proportional to the duty cycle of the pulse width modulation (PWM). Consequently only the mean current through a LED is relevant to the brightness perceived by the human eye. It should be noted that many other types of electrical loads may be driven in a similar way as LEDs, e.g., a generic load whose load current is to be set via modulating a constant source current. Varying the average load current by using modulation techniques are usually preferred over driver circuits which continuously vary the load current as the actual wavelength of the emitted light may vary in an undesired manner when varying the actual load current. Using modulation techniques for adjusting the average load current (and thus the perceived brightness) do not give rise to wavelength variations as the actual load current can only assume the values zero and a preset maximum load current in accordance with a modulation signal.

For the reasons outlined above, driver circuits for driving light emitting diodes or other loads often have to be designed to switch the source current rather fast which gives rise to high current gradients in the supply lines and corresponding electromagnetic emission and electromagnetic interference (EMI). However, particularly when driving LEDs a fast switching of the load is a requirement as load current values different from the desired source current may cause a change in the hue of the emitted color and thus degrade the whole operation of a connected LED device.

In order to reduce the emissions and improve the electromagnetic compatibility (EMC) while still providing a fast and precise switching of the load current there is a need for an improved driver circuit for driving LEDs or other current-driven loads.

SUMMARY OF THE INVENTION

A driver circuit for providing a modulated load current to a load is disclosed. In accordance with one example of the invention the circuit comprises a controllable current source operably coupled to the load and configured to sink or source a first current in accordance with a control signal. A controllable switch is responsive to an input signal, is operably coupled to the current source, and is configured to take over, or not, the first current in accordance with an input signal. The first current is directed as a load current through the load when the controllable switch is driven into a blocking state. The first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load. An input signal includes a first series of pulses defining the desired load current waveform in accordance with a desired modulation scheme. The current source is controlled such that the first current is ramped up before a pulse of the input signal and ramped down after the pulse to achieve desired ramp-up and ramp-down times.

Further a method for providing a modulated load current to a load is disclosed. In accordance with a further example of the invention the method comprises providing a first current in accordance with a control signal, which is configured to take over, or not, the first current using a controllable switch in accordance with an input signal. The first current is directed as a load current through the load when the controllable switch is driven into a blocking state. The first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load. An input signal includes a first series of pulses defining the desired load current waveform in accordance with a desired modulation scheme, and wherein the current source is controlled such that the first current is ramped up before a pulse of the input signal and ramped down after the pulse to achieve desired ramp-up and ramp-down times.

The ramp-up and ramp-down times may be designed to provide a desired slew rate of the control signal and thus of the first current.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale, instead emphasis being placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numerals designate corresponding parts. In the drawings:

FIG. 1 illustrates one exemplary driver circuit for providing a defined modulated current to a load;

FIG. 2 is a timing diagram illustrating, inter alia, the load current and the supply line current over time as occurring during operation of the circuit of FIG. 1;

FIG. 3 is a diagram illustrating the spectra of interferences due to electromagnetic emissions under various operation conditions;

FIG. 4 is a circuit diagram illustrating a first exemplary driver circuit in accordance with the present invention;

FIG. 5 includes a set of timing diagrams illustrating the waveforms of a number of signals occurring in the circuit of FIG. 4 during operation;

FIG. 6 is a circuit diagram illustrating a second exemplary driver circuit in accordance with the present invention; and

FIG. 7 is a circuit diagram illustrating a third exemplary driver circuit in accordance with the present invention.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

Various types of electrical loads are usually supplied with a modulated load current which is derived from a constant supply current using known modulation techniques such as pulse width modulation (PWM), pulse frequency modulation (PFM) or pulse density modulation (PDM) which is also known as sigma-delta modulation. Combination of these modulation techniques are applicable dependent on the application. All these modulation techniques are used to modulate a supply current at a high frequency (e.g., 10 kHz or more for LED driver circuits) so as to achieve a desired value of a low-frequency or quasi-static parameter, such as the average load current, the observable brightness of a LED, or the observable color when driving two or more LEDs of different colors in a multi-color LED arrangement.

FIG. 1 illustrates one simplified example of a driver circuit for providing one LED (or a series circuit of two or more LEDs) with a defined modulated current having an adjustable average which corresponds to the observable brightness of the LED. A power supply (e.g., a battery providing a supply voltage V_(S) of, e.g., 13.8 V) is coupled to the driver circuit 10 (supply terminal A_(VCC)) to supply the driver X_(R) and other circuitry, mainly logic circuitry, with current. The driver circuit 10 usually draws a constant bias current (quiescent current) denoted as i_(CC) in the present example. The LED device 11 (e.g. including one light emitting diode LD) is coupled between the supply line providing the supply voltage V_(S) and an output circuit node (terminal OUT) of the driver circuit 10. The driver circuit 10 is configured to sink the load current i_(L) of the LED device 11 in accordance to a modulated control signal ON received at an input circuit node IN. For this purpose the driver circuit 10 includes a switchable (by means of switch SW) current source Q which is coupled between the output node OUT and a reference potential (e.g. ground potential GND coupled to output terminal A_(GND)) in such a manner that the load current i_(L) is sunk at the output node OUT. In one exemplary embodiment the load current i_(L), which sunk at circuit node OUT, is modulated (e.g., pulse density modulated in accordance with the control signal ON) and thus can assume only two different values, namely either zero or the fixed peak value i_(Lmax). The driver X_(R) is coupled to the switchable current source (in the present example to an electronic switch SW connected in series to the current source Q) in order to switch the load current i_(L) on and off in accordance with the modulated control signal ON.

FIG. 2 illustrates the currents (load current i_(L) and supply current i_(S)) occurring during operation in the driver circuit of FIG. 1 as well as the modulated control signal ON. The bottom diagram of FIG. 2 illustrates the modulated control signal ON which is, for example, a pulse width modulated signal having, in the present example, a duty cycle of 50%. A sigma-delta modulation (pulse density modulation PDM) would lead to a similar waveform of the modulated control signal. The timing diagram in the middle illustrates the load current i_(L) flowing through the LED device 11 and sunk at the circuit node OUT of the driver circuit 10. The switching times of the load current i_(L) match with the switching times of the modulated control signal ON (when ignoring signal propagation delays which are negligible for the present considerations). In the top diagram the waveform of the overall supply current i_(S) is depicted. The supply current i_(S) corresponds to the load current i_(L) plus an additional current offset equaling the quiescent current i_(CC) (bias current) of the driver circuit 10 and further circuitry. FIG. 2 shows that the switching of the load current i_(L) in accordance with the modulated control signal gives rise to significant (step-like) current gradients and thus to an undesired emission of electromagnetic radiation and, as a consequence, to electromagnetic interference (EMI) degrading the electromagnetic compatibility (EMC) of the overall circuit arrangement.

FIG. 3 illustrates the noise spectra resulting from different switching operations as well as the desired maximum noise level over frequency, which is the diagonal line extending from approximately 60 dBμ V for a frequency of about 0.15 MHz to approximately 30 dBμ V for a frequency of about 30 MHz, which is also known as the “BMW limit” (referring to the strict EMC requirements specified by the German car manufacturer BMW). It is desired to reduce the noise spectra to stay below the BMW limit. Compliance with this limit is a requirement for the application of a LED driver circuit in an automotive vehicle.

FIG. 4 illustrates an improved driver circuit 10 for providing a load current i_(L) to a LED device 11 (including one or more LEDs). The driver circuit 10 is configured to modulate the load current i_(L) provided to the LED device 11 in accordance with the modulation of the input signal ON and the control signal CTL. Exemplary waveforms of the input signal ON, the load current i_(L) and the total supply current i_(S) are illustrated in FIG. 5.

In the circuit diagram of FIG. 4, the switchable current source Q (see FIG. 1) is illustrated in more detail. In the present example, the switchable current source includes a current output digital-to-analog converter IDAC which is configured to provide a reference current i_(REF) which can be set via the digital control signal CTL. That is, the value of the digital control signal CTL (e.g., an 8 bit signal) determines the actual analog value of the reference current i_(REF). Thus, the current output digital-to-analog converter IDAC can be seen as (digitally) controllable current source. However, it should be noted that other types of controllable current sources may also be applicable. Furthermore, the current source Q includes an active current mirror which is implemented using an operational amplifier OA, the MOS transistor M₁, and the two resistors having resistance values of R_(S) and R_(S)′=k·R_(S), respectively. The reference current is drained (e.g., to ground) via the resistor R_(S)′. The resulting voltage drop i_(REF)·k·R_(S) is supplied to the non-inverting input of the operational amplifier OA. The output of the operational amplifier OA drives the gate of the MOS transistor M₁ such that the drain current i₁ of the transistor M₁ is proportional to the reference current i_(REF) (by a proportionality factor of k). The source terminal of the MOS transistor M₁ is coupled to a reference potential, e.g., ground potential GND, via the second resistor R_(S). The resulting voltage drop i₁·R_(S) is fed back to the non-inverting input of the operational amplifier OA thus forming a closed-loop operational amplifier circuit. Due to the high amplification factor of the operational amplifier the difference between the operational amplifier's OA input voltages (i_(REF)·k·R_(S) and i₁·R_(S)) is regulated to approximately zero and, as a consequence i₁ is regulated to equal, approximately, k·i_(REF). In essence the reference current is “mirrored” (and amplified by a factor k) as the drain current of the MOS transistor M₁. The drain of the transistor M₁ is coupled to the output circuit node OUT via which transistor M₁ is coupled with the LED device 11 so as to allow for sinking the LED device load current i_(L) via transistor M₁.

Furthermore, the drain of the MOS transistor M₁ is also coupled to the supply terminal A_(VCC) (and thus to the supply potential V_(S)) via a second MOS transistor M₂ whose gate is driven using the driver X₂ in accordance with the input signal ON. In the present example, transistor M₁ is an N-channel MOS transistor whereas transistor M₂ is a P-channel MOS transistor. The P-channel transistor M₂ is conductive when the gate is driven low (i.e., when the input signal ON is low).

The function of the driver circuit 10 as illustrated in FIG. 4 is further explained with reference to the signal timing diagrams illustrated in FIG. 5. Generally the shape of the waveform of i₁ can be (indirectly via the current minor OA, R_(S), R_(S)′, M₁) set by the digital value CTL using the digital-to-analog-converter IDAC. When the P-channel MOS transistor M₂ is in its off state, then the load current of the LED device 11 equals the transistor current i₁. By fully or partially activating the p-channel MOS transistor M₂ in accordance with the input signal ON, the load current i_(L) may be, fully or partially, be taken over by the transistor M₂. When the transistor M₂ is fully conductive (i.e., when signal ON is low) then the LED device is “bypassed” by the transistor M₂, the load current i_(L) through the LED device is zero and the drain current i₂ of the transistor M₂ (also referred to as bypass transistor) equals the drain current i₁ of the N-channel MOS transistor M₁ which is set in accordance with the digital control signal CTL. It should be noted, that the total current drawn from the supply line and drained to ground GND is the drain current i₂ as set by the control signal CTL plus the quiescent current i_(CC) (not shown in FIG. 4, see FIG. 1). Thus, the “shape” of the total supply current waveform (which is responsible for the EMC performance of the whole circuit) can be set by choosing an appropriate control signal CTL. The load current i_(L) provided to the LED device 11 is only activated by switching off the bypass transistor M₂ (i.e., by setting the input signal ON to a high level for P-channel bypass transistors as used in the example of FIG. 5). In other words, the shape of the load supply current i₁+i_(CC) is set using the control signal CTL in such a manner that the circuit complies with the requirements concerning EMI, whereas the current is “handed over” from bypass transistor M₂ to the LED device 11 by properly switching the input signal ON.

Exemplary waveform diagrams of the input signal ON, the currents i₁ and i₂ as well as i_(L) are illustrated in FIG. 5 and discussed below. For the further discussion it is assumed that the load current i_(L) is to be modulated (e.g., using pulse width modulation, pulse frequency modulation, pulse density modulation, or the like). The desired waveform of the load current i_(L) is determined by the waveform of the input signal ON. To generate one load current pulse from time instant t₁ to t₂ the input signal ON is high from time instant t₁ to time instant t₂. During the time interval t₂−t₁ the bypass transistor is on an off state and the load current i_(L) through the LED device equals the current i₁ set by the control signal CTL as explained above. While the input signal ON is low, e.g., for time instants t<t₁ and t>t₂ the P-channel bypass transistor M₂ is conductive and bypasses the LED device 11 and thus the LED device is in an off state.

Before actually switching the LED device 11 on at time instant t₁ the drain current i₁ of transistor M₁ is gradually ramped up from zero to the desired maximum value i_(Lmax) (by correspondingly setting the value of the control signal CTL) while the bypass transistor M₂ is bypassing the LED device 12 and taking over the drain current i₁ of transistor M₁. During this ramp-up period (e.g., between the time instants t₀ and t₁) the bypass transistor M₂ is fully conductive and thus the equations i₁=i₂ and i_(L)=0 are (approximately) valid. The ramp-up of the drain current i₁ (which mainly contributes to the supply current) is illustrated in the bottom diagram in the left column of FIG. 5 (solid line). The corresponding waveform of the input signal ON is illustrated in the top diagram of the left column of FIG. 5. At the end of the ramp-up period (e.g., between the time instants t₁ and t₂) the bypass transistor M₂ is fully blocking (signal ON is high) and thus the equations i₁=i_(L) and i₂=0 are (approximately) valid. In essence the current i₁ of the current source Q is “handed over” from the by transistor M₂ to the LED device 11. At the end of the desired load current pulse, i.e., at time instant t₂, the bypass transistor M₂, again, takes over the current i₁ and the following the equations i₁=i₂ and i_(L)=0 are, again valid. Between the time instants t₂ and t₃ the current i₁ of the current source Q is ramped downed to zero with a defined slew rate. By properly setting the time intervals t₁−t₀ and t₃−t₂ (via the control signal CTL) the slew rate may be set to any desired value while maintaining a sharp transition (as desired) in the actual load current i_(L) flowing through the LED device. A low slew rate (measured, e.g., in amperes per nanosecond, A/ns) significantly improves the electromagnetic compatibility by reducing the electromagnetic interferences (EMI) generated by the overall circuit.

The example illustrated in FIG. 6 is essentially identical with the example in FIG. 4, the only difference is that the P-channel bypass transistor M₂ is replaced by an N-channel bypass transistor (also denoted as M₂ in FIG. 6). Accordingly the input signal ON has to be inverted as compared to the example of FIG. 4. Furthermore the load current i_(L) is not directly sunk by the MOS transistor M₁ as in the previous example, but via a third transistor M₂′ which is coupled between the LED device 11 and the load path of transistor M₁. The third transistor M₂′ is driven with a gate signal inverse (inverter X₁) to the gate signal of the bypass transistor M₂ (generated by driver X₂). The third transistor M₂′ is only required when the supply potential V_(L) supplying the LED device 11 is higher as the supply potential V_(S) supplying the driver circuit 10. Otherwise the intrinsic reverse diode of the bypass transistor M₂ would become conductive in a undesired manner. Nevertheless, the function of the example of FIG. 6 is essentially the same as the function of the previous example.

The example of FIG. 7 is also essentially identical with the example of FIG. 4 with the only difference that the P-channel bypass transistor M₂ has a second P-channel transistor M₂′ coupled in series thereto in an “upside-down” configuration, such that the second P-channel MOS transistor M₂′ essentially operates as a diode preventing a reverse conduction of the actual bypass transistor M₂ in cases where the supply potential V_(L) supplying the LED device 11 is higher as the supply potential V_(S) supplying the driver circuit 10. The base of the second P-channel may be unconnected or its base may be connected to the source electrode.

It should be noted that the input signal ON defining the ON pulses of the load current i_(L) and the control signal CTL defining the slew rate of the overall supply current as explained above are typically generated using a digital processor or a microcontroller. However, any other controllable signal sources may be appropriate.

Some aspects of the invention are summarized below. However, the following is not to be regarded as a complete enumeration of features essential for the present invention. In the figures discussed above a number of driver circuits are shown for providing a modulated load current i_(L) to a load. The circuits comprise a controllable current source Q coupled to the load, which, e.g., is the LED device 11. The controllable current source Q is configured to sink our source a first current i₁ in accordance with a control signal CTL which may be a digital signal. A controllable switch (e.g., the bypass transistor M₂) is responsive to an input signal ON and connected to the current source Q. The switch is configured to take over, or not, the first current i₁ in accordance with the input signal ON, in such a manner that the first current i₁ is directed as load current i_(L) through the LED device 11 when the controllable switch is driven into a blocking state. Further, the first current i₁ is directed through the controllable switch when the switch is driven into its conducting state thus bypassing the LED device 11. For this purpose the input signal ON includes a first series of pulses which define the desired load current waveform in accordance with a desired modulation scheme. Finally, the current source Q is controlled such that the first current i₁ is ramped up before a pulse of the input signal ON and ramped down after the pulse to achieve desired ramp-up and ramp-down times. The ramp-up and ramp-down times are set to achieve a desired slew rate of the first current i₁.

Although various exemplary embodiments of the invention have been disclosed, it will be apparent to those skilled in the art that various changes and modifications can be made which will achieve some of the advantages of the invention without departing from the spirit and scope of the invention. It will be obvious to those reasonably skilled in the art that other components performing the same functions may be suitably substituted. It should be mentioned that features explained with reference to a specific figure may be combined with features of other figures, even in those not explicitly mentioned. Further, the methods of the invention may be achieved in either all software implementations, using the appropriate processor instructions, or in hybrid implementations that utilize a combination of hardware logic and software logic to achieve the same results. Such modifications to the inventive concept are intended to be covered by the appended claims. 

What is claimed is:
 1. A driver circuit for providing a modulated load current to a load, the driver circuit comprising: a controllable current source operably coupled to the load and configured to sink or source a first current in accordance with a control signal; and a controllable switch responsive to an input signal, the controllable switch operably coupled to the current source and configured to take over, or not take over, the first current in accordance with the input signal, such that the first current is directed as a load current through the load when the controllable switch is driven into a blocking state, and the first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load; wherein the input signal includes a first series of pulses defining a desired load current waveform in accordance with a desired modulation scheme; and wherein the current source is controlled such that the first current is ramped up before a pulse of the input signal and ramped down after the pulse to achieve desired ramp-up and ramp-down times.
 2. The driver circuit of claim 1, wherein the controllable current source comprises a digital-to-analog converter configured to receive digital values of the control signal and to provide a respective analog signal, wherein the driver is configured to provide the first current such that the first current is substantially proportional to the analog signal.
 3. The driver circuit of claim 1, wherein the controllable current source comprises: a current output digital-to-analog converter configured to receive digital values of the control signal and to provide a reference current responsive to the control signal; and a current mirror circuit configured to provide the first current such that the first current is proportional to the reference current.
 4. The driver circuit of claim 1, wherein the controllable switch comprises a bypass transistor having a main current path coupled to the controllable current source, the bypass transistor configured to be switched on and off in accordance with the input signal.
 5. The driver circuit of claim 4, wherein the bypass transistor is coupled between the controllable current source and a first supply potential.
 6. The driver circuit of claim 5, wherein the bypass transistor comprises a P-channel MOS transistor.
 7. The driver circuit of claim 4, further comprising a further transistor coupled between the controllable current source and the load, the further transistor configured to be driven with an inverted version of the input signal provided to the bypass transistor.
 8. The driver circuit of claim 7, wherein the bypass transistor and the further transistor comprise N-channel MOS transistors.
 9. The driver circuit of claim 4, wherein the bypass transistor comprises a P-channel MOS transistor, the driver circuit further comprising a further P-channel MOS transistor coupled in series with the bypass transistor such that source electrodes of the bypass transistor and the further P-channel MOS transistor are directly connected to a common circuit node in such a way that the further P-channel MOS transistor operates as a diode.
 10. The driver circuit of claim 1, wherein the input signal and the control signal are provided by a micro-controller or a digital processor.
 11. The driver circuit of claim 1, further comprising a processor, wherein the input signal and the control signal are provided by the processor.
 12. The driver circuit of claim 11, wherein the processor comprises a micro-controller.
 13. The driver circuit of claim 11, wherein the processor comprises a digital processor.
 14. The driver circuit of claim 1, wherein the control signal is composed of a second series of pulses having a defined slew rate, wherein each pulse of the first series of pulses occurs during a corresponding pulse of the second series.
 15. The driver circuit of claim 14, wherein the pulses of the second series have pulse widths that are longer than pulse widths of corresponding pulses of the first series by at least respective ramp-up and the ramp-down times of the pulses of the second series.
 16. The driver circuit of claim 14 wherein a ramp-up time period and a ramp-down time period of one pulse of the second series occur prior to and, respectively, after the corresponding pulse in the first series.
 17. A method for providing a modulated load current to a load, the method comprising: providing a first current in accordance with a control signal; taking over, or not taking over, the first current using a controllable switch in accordance with an input signal, such that the first current is directed as a load current through the load when the controllable switch is driven into a blocking state, and the first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load; wherein the input signal includes a first sequence of pulses that define a desired load current waveform in accordance with a desired modulation scheme; and wherein a current source is configured to be controlled such that the first current is ramped up before a pulse of the input signal and ramped down after the pulse to achieve desired ramp-up and ramp-down times.
 18. The method of claim 17, wherein the control signal is composed of a second sequence of pulses having a defined slew rate, wherein each pulse of the first sequence occurs during a corresponding pulse of the second sequence.
 19. The method of claim 18, wherein the pulses of the second sequence have pulse widths that are longer than pulse widths of the corresponding pulses of the first sequence by at least the respective ramp-up and the ramp-down times of the pulses of the second sequence.
 20. The method of claim 18, wherein a ramp-up time period and a ramp-down time period of one pulse of the second sequence occur prior to and, respectively, after the corresponding pulse in the first sequence. 